engineering
Posted Mar 2Hardware Tools Engineer
at openai
San Francisco, United StatesRemote
Requirements
- About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads.
- Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models.
- By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform.
- The work spans software engineering, compiler concepts, and practical hardware workflows, with direct impact on how quickly and effectively we design next-generation AI systems.
- You might thrive in this role if: - Demonstrated ability to build and maintain software (projects, internships, research, open source, or equivalent experience).
- - Strong CS fundamentals: data structures, algorithms, debugging, and software design.
- - Proficiency in at least one of Rust, C++, or Python (and willingness to learn the rest).
- - Familiarity with digital design concepts and the ability to read RTL (Verilog/SystemVerilog) or equivalent hardware descriptions.
- - Familiarity with compiler or IR-based ideas (representations, passes, transformations, lowering), through coursework or projects.
- Nice to have skills: - Exposure to compiler and hardware toolchains such as XLS/DSLX, LLVM, Chisel/FIRRTL, CIRCT/MLIR, other novel hardware languages (e.g.
- HardCaml, SpinalHDL, Spade, PyMTL, Clash, BlueSpec, PyRope) -
- Experience with Verilog tooling ecosystems (Yosys/RTLIL, Verilator, Slang) or writing tooling around them. -
- Experience with build and test infrastructure (Bazel, CI systems, fuzzing, performance testing). - Prior work touching synthesis, place and route, static timing analysis, or other PPA-related workflows.
- requirements as provided in those laws and regulations. About OpenAI OpenAI is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence
Additional details
- About the Role You will develop and evolve the tooling ecosystem that hardware engineers rely on every day — from hardware compilers and IR transformations to simulation, debugging, and automation infrastructure.
- You’ll collaborate closely with architects, RTL designers, and verification engineers to translate real engineering friction into durable, scalable tooling solutions. In this role
- you will: - Build and improve the software tooling that makes hardware teams faster: compilation, IR transforms, RTL generation, simulation, debug, and automation. - Extend and integrate hardware compiler stacks (frontends, IR passes, lowering, scheduling, codegen to Verilog/SystemVerilog) and connect them to real design workflows. - Improve developer
- experience and reliability: reproducible builds, better error messages, faster iteration loops, and dependable CI and regression infrastructure.
- - Work closely with designers and verification engineers to turn real pain points into durable tools.
- - Dive into RTL when needed: read and reason about Verilog/SystemVerilog to debug issues, validate tool output, and improve debuggability.
- - Be willing to go all the way down the stack when necessary, including gate-level views, synthesis results, and implementation artifacts.
- - Help enable PPA optimization loops by building analysis and automation around area, timing, and power tradeoffs, and by improving tooling that impacts those outcomes.
- - Comfort operating in ambiguity and iterating quickly with users of your tools.
- To comply with U.S. export control laws and regulations, candidates for this role may need to meet certain legal status