engineering
Posted Mar 31Staff FPGA/Firmware Engineer
at Turion Space
Irvine, United StatesOn-site
Linux$175,000
Responsibilities
- Responsibilities - Own development of HDL and firmware on custom FPGA, FPGA SoC and low-level embedded systems - Provide early guidance and input on architecture decision for subsystem and vehicle-level architectures - Define
- requirements and processes to ensure traceability and progress tracking - Develop custom HDL modules for FPGA systems (focus on high speed data movement and handling) - Design firmware for soft cores (MicroBlaze, RISC-V, etc.) platforms to interface with FPGA fabric and peripherals - Create custom HDL to interface with SoC hard cores, drivers and corresponding custom firmware.
Requirements
- We are looking for a Staff FPGA/Firmware Engineer to join our rapidly growing team in Irvine, CA.
- In this role, you will be accountable for the architecture, end-to-end design and verification of projects FPGA/SOC systems.
- This will require expertise and/or familiarity with: HDL, firmware, and low-level Linux.
- experience developing firmware, or, HDL for FPGAs in a professional environment - Bachelor’s degree in Electrical Engineering, Computer Science, Mathematics, or related field - Demonstrated work in RTL design using VHDL, Verilog, and/or SystemVerilog - Proficiency with FPGA design tools (Xilinx Vivado, Microchip Libero, or similar) -
- Experience developing firmware in bare-metal or RTOS environments -
- Experience developing embedded systems using C/C++ - Strong understanding of digital design and embedded systems principles - Ability to obtain a Secret and/or TS/SCI security clearance Preferred Qualifications -
- Experience with high-level synthesis (HLS) tools (e.g. Xilinx Vitis HLS, MATLAB FPGA generator) -
- Experience with FPGA verification techniques (formal verification, UVM, SystemVerilog assertions) - Familiarity with Xilinx Ultrascale, Zynq MPSoC, Versal, and/or Microchip PolarFire platforms - Proficiency working with firmware development tools such as JLink, Keil, IAR, or GCC -
- Experience with FreeRTOS and embedded Linux. - Strong understanding of FPGA timing, floor planning, and clock domain crossing best practices -
- Experience with AMBA bus architectures (AXI, AHB, APB) and custom AXI IP design -
- Experience with high-speed serial interfaces (GbE, PCIe, Aurora, LVDS) and low-speed interfaces (RS422, UART, I2C, SPI) - Familiarity with RAM architectures, efficient buffering techniques, and FLASH interfaces (ONFi) -